NONVOLATILE MEMORY DEVICE WITH VERTICAL MEMORY CELL AND METHOD FOR MANUFACTURING THE SAME
PURPOSE: A nonvolatile memory device including a memory cell of a vertical structure and a manufacturing method thereof are provided to reduce manufacturing costs per unit bit by increasing the number of memory gates to improve memory integration. CONSTITUTION: A plurality of gate electrodes(103A,10...
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Main Author | |
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Format | Patent |
Language | English Korean |
Published |
06.03.2013
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Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: A nonvolatile memory device including a memory cell of a vertical structure and a manufacturing method thereof are provided to reduce manufacturing costs per unit bit by increasing the number of memory gates to improve memory integration. CONSTITUTION: A plurality of gate electrodes(103A,103B,103C,103D) are vertically laminated on a semiconductor substrate(101) and are extended in a first direction. A bonding layer(111A) includes a first region and a second region between the plurality of gate electrodes. The first region is extended in a second direction across the gate electrode on the semiconductor substrate. A cell channel layer(111B) is formed between the plurality of gate electrodes. A charge trap dielectric layer(110) is formed between the gate electrode and the cell channel layer. |
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Bibliography: | Application Number: KR20110084122 |