STRUCTURE AND METHOD FOR SINGLE GATE NON-VOLATILE MEMORY DEVICE
PURPOSE: A structure and method for a single gate nonvolatile memory device are provided to improve productivity by simultaneously forming common drain and source in the same process. CONSTITUTION: A semiconductor substrate(210) includes a peripheral region(212) and a memory region(214). A gate stac...
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Main Authors | , |
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Format | Patent |
Language | English Korean |
Published |
28.01.2013
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Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: A structure and method for a single gate nonvolatile memory device are provided to improve productivity by simultaneously forming common drain and source in the same process. CONSTITUTION: A semiconductor substrate(210) includes a peripheral region(212) and a memory region(214). A gate stack(220) includes a first gate dielectric feature(226a) and a first gate electrode(228a). A second gate stack(222) includes a second gate dielectric feature(226b) and a second gate electrode(228b). A third gate stack(224) includes a third gate dielectric feature(226c) and a third gate electrode(228c). The second gate stack and the third gate stack are separated by an STI feature(216). |
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Bibliography: | Application Number: KR20120012880 |