DEMULTIPLEXER

PURPOSE: A demultiplexer is provided to form the entire structure with a small number of devices, thereby obtaining high performance with small power. CONSTITUTION: A demultiplexer(200) comprises an NRZ(Non-Return-to-Zero) D flip-flop(210). The NRZ D flip-flop comprises an RZ(Return-to-Zero) D flip-...

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Bibliographic Details
Main Authors YANG, KYOUNG HOON, LEE, JOO SEOK
Format Patent
LanguageEnglish
Korean
Published 12.12.2011
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Summary:PURPOSE: A demultiplexer is provided to form the entire structure with a small number of devices, thereby obtaining high performance with small power. CONSTITUTION: A demultiplexer(200) comprises an NRZ(Non-Return-to-Zero) D flip-flop(210). The NRZ D flip-flop comprises an RZ(Return-to-Zero) D flip-flop(220) and an SR(Set/Reset) latch(230). The demultiplexer demultiplexes an input signal based on a received input signal and a received clock signal to generate two output signals. The demultiplexer includes a first NRZ D flip-flop(210a) and a second NRZ D flip-flop(210b). The first NRZ D flip-flop and the second NRZ D flip-flop include RZ D flip-flops and SR latches respectively. The RZ D flip-flops generate an output signal corresponding to an input signal and an RZ output signal. The SR latch generates an NRZ output signal.
Bibliography:Application Number: KR20100052831