TERMINATION CIRCUIT FOR ON-DIE TERMINATION

A termination circuit (900) for a terminal (914) of a semiconductor device is disclosed, wherein the terminal (914) is associated with an expected voltage swing. The termination circuit (900) may comprise a MOS transistor (902) connected between the terminal (914) and a power supply at a supply volt...

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Bibliographic Details
Main Author GILLINGHAM PETER B
Format Patent
LanguageEnglish
Korean
Published 30.11.2011
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A termination circuit (900) for a terminal (914) of a semiconductor device is disclosed, wherein the terminal (914) is associated with an expected voltage swing. The termination circuit (900) may comprise a MOS transistor (902) connected between the terminal (914) and a power supply at a supply voltage (V XYZ ) and analog control circuitry (928) for enabling and disabling on-die termination, which may comprise calibrator circuitry (952) with access to a reference resistance. The calibrator circuitry (952) may be configured to carry out a calibration process for identifying an analog calibration voltage (EN_902) that would cause the transistor (902) to impart a resistance substantially equal to the reference resistance if supplied thereto as gate voltage. The control circuitry (928) may further be configured to drive the gate of the transistor (902G) with said one of a plurality of analog calibration voltages when on-die termination is enabled.
Bibliography:Application Number: KR20117021235