FLASH MEMORY DEVICE FOR IMPROVING REPAIR EFFICIENCY AND OPERATION METHOD THEREOF

Provided is a flash memory device that can include a memory cell configured to store data, a local bit line that is connected to the memory cell, a global bit line that is connected to the local bit line, a discharge transistor that is connected to the global bit line, and that is configured to sele...

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Bibliographic Details
Main Authors JANG, HOUNG KUK, LEE, HAE BUM, YUN, HYE YEON, KIM, JIN YOUNG, KIM, EUI DO, KWON, SANG YOUL, LEE, BONG YONG
Format Patent
LanguageEnglish
Korean
Published 08.09.2011
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Provided is a flash memory device that can include a memory cell configured to store data, a local bit line that is connected to the memory cell, a global bit line that is connected to the local bit line, a discharge transistor that is connected to the global bit line, and that is configured to selectively connect the global bit line to a reference level responsive to a discharge control signal, and a discharge control circuit, that is connected to the discharge transistor via the discharge control signal, and that is configured to selectively disable the discharge transistor during an erase interval occurring before a verify interval of an erase verification operation carried out by the flash memory device.
Bibliography:Application Number: KR20100018658