HIGH-VOLTAGE TRANSISTOR STRUCTURE WITH REDUCED GATE CAPACITANCE

PURPOSE: A high-voltage transistor structure with reduced gate capacitance is provided to discharge the capacitor connected to both ends of a power system. CONSTITUTION: An N-well region(12) is formed within a P type silicon substrate. A drain region(11) is materially arranged on the middle of the w...

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Bibliographic Details
Main Authors BANERJEE SUJIT, PARTHASARATHY VIJAY
Format Patent
LanguageEnglish
Korean
Published 06.04.2011
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: A high-voltage transistor structure with reduced gate capacitance is provided to discharge the capacitor connected to both ends of a power system. CONSTITUTION: An N-well region(12) is formed within a P type silicon substrate. A drain region(11) is materially arranged on the middle of the well region. The well region has a boundary or an edge(13) separated from the drain region. The drain region has the size extending in y direction. A polygate(15) is extended in y direction from both sides of the drain.
Bibliography:Application Number: KR20100093846