MANUFACTURING METHOD FOR METAL SILICIDE PATTERNS OF SEMICONDUCTOR DEVICE

PURPOSE: A method for forming a metal silicide pattern of a semiconductor device is provided to decrease the deterioration of a device due to a necking phenomenon by securing the area of the metal silicide pattern to be reacted with metal. CONSTITUTION: A poly silicon pattern(109a) is formed on the...

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Bibliographic Details
Main Author SHIM, JUNG MYOUNG
Format Patent
LanguageEnglish
Korean
Published 09.03.2011
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: A method for forming a metal silicide pattern of a semiconductor device is provided to decrease the deterioration of a device due to a necking phenomenon by securing the area of the metal silicide pattern to be reacted with metal. CONSTITUTION: A poly silicon pattern(109a) is formed on the upper side of a gate insulation layer(103) formed on a semiconductor substrate. A poly silicon layer and a hard mask pattern(111a) are formed on the upper side of the gate insulation layer. The poly silicon patterns include the upper side of a first width and the lower side of a second width that is narrower than the first width. An insulation layer is formed to expose the upper side of the poly silicon pattern. A metal silicide layer is formed on the upper side of the exposed poly silicon pattern.
Bibliography:Application Number: KR20090082073