METHOD FOR PRODUCING A MULTIPLICITY OF CHIPS AND CORRESPONDINGLY PRODUCED CHIP
The present invention proposes a production method for chips in which as many method steps as possible are carried out in the wafer assemblage, that is to say in parallel for a multiplicity of chips arranged on a wafer. This concerns a method for producing a multiplicity of chips whose functionality...
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Main Authors | , , , , , , |
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Format | Patent |
Language | English Korean |
Published |
07.06.2010
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Subjects | |
Online Access | Get full text |
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Summary: | The present invention proposes a production method for chips in which as many method steps as possible are carried out in the wafer assemblage, that is to say in parallel for a multiplicity of chips arranged on a wafer. This concerns a method for producing a multiplicity of chips whose functionality is realized on the basis of the surface layer (2) of a substrate (1). In this method, the surface layer (2) is patterned and at least one cavity is produced below the surface layer (2) such that the individual chip regions (5) are interconnected and/or connected to the rest of the substrate (1) merely by means of suspension webs, and/or such that the individual chip regions (5) are connected to the substrate layer (4) below the cavity by means of supporting elements (7) in the region of the cavity. The suspension webs and/or supporting elements (7) are separated during singulation of the chips. According to the invention, the patterned and undercut surface layer (2) of the substrate (1) is embedded into a plastics composition (10) before the singulation of the chips. |
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Bibliography: | Application Number: KR20107005407 |