PHASE-CHANGE RANDOM ACCESS MEMORY CAPABLE OF PREVENTING COUPLING NOISE DURING READ WHILE WRITE OPERATION

A phase change memory device is provided to minimize a coupling noise by arranging a shielding unit between a write global bit line and a read global bit line. Local bit lines(LBL0-LBL7) are connected to memory cells(SCA). One or more write global bit lines(WGBL) are connected to the local bit lines...

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Bibliographic Details
Main Authors CHOI, BYUNG GIL, CHO, BEAK HYUNG
Format Patent
LanguageEnglish
Published 26.08.2009
Subjects
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