PHASE-CHANGE RANDOM ACCESS MEMORY CAPABLE OF PREVENTING COUPLING NOISE DURING READ WHILE WRITE OPERATION

A phase change memory device is provided to minimize a coupling noise by arranging a shielding unit between a write global bit line and a read global bit line. Local bit lines(LBL0-LBL7) are connected to memory cells(SCA). One or more write global bit lines(WGBL) are connected to the local bit lines...

Full description

Saved in:
Bibliographic Details
Main Authors CHOI, BYUNG GIL, CHO, BEAK HYUNG
Format Patent
LanguageEnglish
Published 26.08.2009
Subjects
Online AccessGet full text

Cover

Loading…
Abstract A phase change memory device is provided to minimize a coupling noise by arranging a shielding unit between a write global bit line and a read global bit line. Local bit lines(LBL0-LBL7) are connected to memory cells(SCA). One or more write global bit lines(WGBL) are connected to the local bit lines. One or more read global bits(RGBL) line are connected to the local bit lines. A plurality of banks are formed with a stack structure. A shielding unit is arranged between the adjacent write global bit line and the read global bit line. A ground voltage is applied to the shielding unit.
AbstractList A phase change memory device is provided to minimize a coupling noise by arranging a shielding unit between a write global bit line and a read global bit line. Local bit lines(LBL0-LBL7) are connected to memory cells(SCA). One or more write global bit lines(WGBL) are connected to the local bit lines. One or more read global bits(RGBL) line are connected to the local bit lines. A plurality of banks are formed with a stack structure. A shielding unit is arranged between the adjacent write global bit line and the read global bit line. A ground voltage is applied to the shielding unit.
Author CHOI, BYUNG GIL
CHO, BEAK HYUNG
Author_xml – fullname: CHOI, BYUNG GIL
– fullname: CHO, BEAK HYUNG
BookMark eNqNi80KwjAQhHvQg3_vsOC5UBUEj2u6bYI2CZvU4qkUiXiQtlDfH1vwAYSBmQ--WUaztmvDInpZiY5iIVHnBIw6NQWgEOQcFFQYvoNAi-crgcnAMt1Ie6VzEKa012looxxBWvIETJhCJdWoV6z8eLLE6JXR62j-bN5D2Px6FW0z8kLGoe_qMPTNI7ThU194nySnKcdkh4f_rC8z1jgH
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
Physics
ExternalDocumentID KR20090090601A
GroupedDBID EVB
ID FETCH-epo_espacenet_KR20090090601A3
IEDL.DBID EVB
IngestDate Fri Jul 19 11:29:13 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_KR20090090601A3
Notes Application Number: KR20080015918
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090826&DB=EPODOC&CC=KR&NR=20090090601A
ParticipantIDs epo_espacenet_KR20090090601A
PublicationCentury 2000
PublicationDate 20090826
PublicationDateYYYYMMDD 2009-08-26
PublicationDate_xml – month: 08
  year: 2009
  text: 20090826
  day: 26
PublicationDecade 2000
PublicationYear 2009
RelatedCompanies SAMSUNG ELECTRONICS CO., LTD
RelatedCompanies_xml – name: SAMSUNG ELECTRONICS CO., LTD
Score 2.7512422
Snippet A phase change memory device is provided to minimize a coupling noise by arranging a shielding unit between a write global bit line and a read global bit line....
SourceID epo
SourceType Open Access Repository
SubjectTerms INFORMATION STORAGE
PHYSICS
STATIC STORES
Title PHASE-CHANGE RANDOM ACCESS MEMORY CAPABLE OF PREVENTING COUPLING NOISE DURING READ WHILE WRITE OPERATION
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090826&DB=EPODOC&locale=&CC=KR&NR=20090090601A
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_m_HzTqfgxJaD0rbiPdmUPQ7I0XefWpnSfPo21tihIN1zFf99Lu-meBnkISTiSC3eXXO5-AXg0qlqtGldrahi-6ao2r6EebBoVVZNQKBLRvJJH-boNe6S9TPVpAT43uTAZTuhPBo6IEhWivKeZvl7-O7HMLLZy9RR8YNPi2Rq2TGVzO5YfeDcUs93injAFUxhr9XzF9fM-LHj_oHuwLw_SEmmfj9syL2W5bVSsUzjwkF6SnkEhSkpwzDZ_r5XgyFk_eZfgMIvRDFfYuJbD1Tm8ezYdcJXZ1O1w4lPXFA6hjCE3icMd4b8SRj3a7nMiLIJcHnN32HU7hImR15cVV3QHnJgjGQxBfE5NMrG7OHzioy4jwuO58-oCHiw-ZLaKk5_98WrW87dXWr-EYrJIoisgcVyX2PVaGDdCLcZdiI0w0ueGFjUDPYj0ayjvonSzu_sWTvJnFhS7RhmK6dd3dIfWOg3uMyb_AipJjhs
link.rule.ids 230,309,786,891,25594,76906
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3rT8IwEL8gPvCbosYHahPNvi3y2CN8IKZ0HUPYI2M8_ETY3KKJASIz_vteN1A-kfRD0zZN75q79tq73wE86jWlXktqdTmK3lRZmdVRDzb1qqwIKBSBaF7NvXwdzRoqLxN1UoDPTSxMhhP6k4EjokRFKO9ppq-X_49YRuZbuXoKP7Bp8WwGLUPaWMcigbcmGe0W91zDZRJjrZ4vOX7ehwXtD7oH-7rA5xWXp1FbxKUstw8V8wQOPJxvnp5CIZ6XocQ2udfKcGSvv7zLcJj5aEYrbFzL4eoM3j2LDrjMLOp0OPGpY7g2oYwhN4nNbdd_JYx6tN3nxDUJcnnEnaDrdAhzh15fVBy3O-DEGApnCOJzapCx1cXhYx91GXE9nj9encODyQNmybj46R-vpj1_m9LGBRTni3l8CSRJGgK7XokSLVIS3IVEj2J1pitxM1TDWL2Cyq6Zrnd330PJCuz-FCno3cBx_uWCIqhVoJh-fce3eHKn4V3G8F_4p5EI
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=PHASE-CHANGE+RANDOM+ACCESS+MEMORY+CAPABLE+OF+PREVENTING+COUPLING+NOISE+DURING+READ+WHILE+WRITE+OPERATION&rft.inventor=CHOI%2C+BYUNG+GIL&rft.inventor=CHO%2C+BEAK+HYUNG&rft.date=2009-08-26&rft.externalDBID=A&rft.externalDocID=KR20090090601A