METHOD OF MANUFACTURING ARRAY SUBSTRATE AND ARRAY SUBSTRATE

A manufacturing method of an array substrate is provided to minimize damage to a fine pattern. A gate line(122) and a gate electrode(124) are formed on a base substrate(110). A source metal layer(150) is formed on the base substrate on which the gate line and the gate electrode are formed. A data li...

Full description

Saved in:
Bibliographic Details
Main Authors KIM, SANG GAB, KIM, JANG SOO, PARK, HONG SICK, KIM, SHI YUL, JEONG, YU GWANG, OH, MIN SEOK, CHOI, SHIN IL
Format Patent
LanguageEnglish
Korean
Published 27.07.2009
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:A manufacturing method of an array substrate is provided to minimize damage to a fine pattern. A gate line(122) and a gate electrode(124) are formed on a base substrate(110). A source metal layer(150) is formed on the base substrate on which the gate line and the gate electrode are formed. A data line(155), a source electrode(157), and a drain electrode(158) are formed by etching the source metal layer. The data line intersects with the gate line. The source electrode is connected to the data line. The drain electrode is isolated from the source electrode. An additive gas is provided on the base substrate on which the drain electrode is formed. An etching component of an etching gas reacts to the source metal layer. A by-product formed on each side wall of the data line, the source electrode, and the drain electrode is removed. A pixel electrode is contacted with the drain electrode.
Bibliography:Application Number: KR20080006751