APPARATUS FOR TRANSMITTING DATA
A device for transferring data is provided to write/read data stably between a memory controller and a memory device without twisting or winding a transfer line between the memory controller and the memory device by compensating delay time of data and data strobe signals transferred through the tran...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
16.07.2008
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Subjects | |
Online Access | Get full text |
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Summary: | A device for transferring data is provided to write/read data stably between a memory controller and a memory device without twisting or winding a transfer line between the memory controller and the memory device by compensating delay time of data and data strobe signals transferred through the transfer line. A delay determiner(200) generates a set signal when a plurality of concurrent transfer signals are received. A plurality of delay time setting units(210-1~210-N) sets delay time by counting time from reception of the concurrent transfer signals to generation of the set signal. A plurality of delay units(220-1~220-N) respectively delays the concurrent transfer signals according to the set delay time. The delay determiner generates the set signal when an enable signal is output from a memory controller. The delay time determiner comprises an AND gate logically multiplying the concurrent transfer signals and the enable signal output from the memory controller. The delay time setting unit includes a counter counting a clock signal when the concurrent transfer signals are received and a register storing a count value according to the set signal and outputting the count value to the delays as the delay time. |
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Bibliography: | Application Number: KR20070003219 |