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Summary:A shift register is provided to prevent multi outputs by setting a charge voltage source based on the variation amount of a threshold voltage of a pull-down switching element. A shift register includes plural stages which sequentially output scan pulses. At least one stage includes a pull-up switching element, a pull-down element, and a node controller(Nc). The pull-up switching element is turned on/off according to a logical state of a first node(n1) and outputs clock pulses as the scan pulses when the logical state is turn on. The pull-down element is turned on/off according to a logical state of a second node(n2) and outputs voltages for discharge when the logical state is turn on. The node controller controls the logical state of the first node using a first charge voltage source(VDD1) and the logical state of the second node using a second charge voltage source(VDD2) different from the first charge voltage source.
Bibliography:Application Number: KR20060118368