METHOD FOR MANUFACTURING DAMASCENE MIM TYPE CAPACITOR OF SEMICONDUCTOR DEVICE

A method for manufacturing a semiconductor device having a damascene MIM capacitor is provided to simplify a manufacturing process by reducing the number of processes. A first and second interlayer dielectrics(12,13) are formed on a semiconductor substrate(10). A lower wiring and contact(16) and a b...

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Bibliographic Details
Main Author KIM, SEON HEUI
Format Patent
LanguageEnglish
Published 08.05.2008
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for manufacturing a semiconductor device having a damascene MIM capacitor is provided to simplify a manufacturing process by reducing the number of processes. A first and second interlayer dielectrics(12,13) are formed on a semiconductor substrate(10). A lower wiring and contact(16) and a bottom electrode of capacitor are formed on the interlayer dielectrics. A dielectric layer(20) and a third interlayer dielectric(22) are formed on the resultant. A via hole and an opening are formed by etching the third interlayer dielectric. The via hole and the opening are filled with a gap-fill layer(34a). A trench(40) is formed by etching the third interlayer dielectric and the gap-fill layer. The gap-fill layer of the opening is removed by removing the exposed gap-fill layer and the dielectric layer. A metal is formed on the trench, the via hole, and the third interlayer dielectric of the opening. A via and an upper wiring are formed in the trench and the via hole. A top electrode of capacitor is formed on the dielectric layer of the opening.
Bibliography:Application Number: KR20060108518