SEMICONDUCTOR MEMORY DEVICE AND METHOD THEREOF

A semiconductor memory device and an operation method thereof are provided to reduce test initialization time by performing hidden test operation using CBR(CAS Before RAS) refresh. A memory cell array(10) comprises a plurality of memory cells connected between a plurality of word lines and a plurali...

Full description

Saved in:
Bibliographic Details
Main Author SONG, YOON GYU
Format Patent
LanguageEnglish
Published 15.01.2008
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online AccessGet full text

Cover

Be the first to leave a comment!
You must be logged in first