APPARATUS AND METHOD FOR SYNCHRONIZATION IN SLEEP AND IDLE MODE OF BROADBAND WIRELESS ACCESS SYSTEM

• Main Authors: KIM, IN HYOUNG, LEE, HO SEUNG, PARK, YUN SANG, CHO, HYUN SANG, LIM, IN CHUN, SONG, BONG GEE
• Format: Patent
• Language: English
• Published: 20.08.2007
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TRANSMISSION

An apparatus for attaining synchronization in a sleep and idle mode of a broadband wireless access system and a method thereof are provided to reduce time in attaining the synchronization by replacing initial synchronization tasks. An apparatus for attaining synchronization in a sleep and idle mode of a broadband wireless access system comprises a CPU(Central Processing Unit,208), a power domain controller(210), a VIC(Vectored Interrupt Controller,215), an always on power controller(220), a sleep controller(225), a clock generator(230), a synchronization controller(235) and an RF controller(240). The CPU(208) stores information related to sleep and idle control at a register of the sleep controller(225), the synchronization controller(235), and the RF controller(240) when the system is transferred to a sleep and idle mode. The power domain controller(210) does not supply power for other block except a power always on block(209), for which power has to be always supplied, in the sleep and idle mode in order to save power. The VIC(215) controls an interrupt generated by each block and offers the interrupt to the always on power controller(220). The always on power controller(220) does not provide a clock for the synchronization controller(235) among blocks for which power has to be supplied in the sleep and idle mode by controlling the clock generator(230), and supplies a clock, whose frequency is lower than a frequency of the clock in a normal state, for remaining blocks except for the synchronization controller(235). The sleep controller(225) awakes the CPU(208) from the sleep and idle mode by providing an interrupt for the interrupt controller(215) when a time counting value, performed by the clock generator(230) on the basis of a clock with a provided lower frequency, gets identical to short sleep and idle time set by the CPU(208). The clock generator(230) provides a clock with a necessary frequency for each block. The synchronization controller(235) controls synchronization of each block and maintains the synchronization via a frame counting operation. The RF controller(240) controls an RF block outside an IC and controls an AGC(Automatic Gain Control) gain value.