A SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR REGIONS HAVING DIFFERENTLY STRAINED CHANNEL REGIONS AND A METHOD OF MANUFACTURING THE SAME

By locally modifying the intrinsic stress of a dielectric layer laterally enclosing gate electrode structures of a transistor configuration formed in accordance with in-laid gate techniques, the charge carrier mobility of different transistor elements may individually be adjusted. In particular, in...

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Bibliographic Details
Main Authors BUCHHOLTZ WOLFGANG, PRUEFER EKKEHARD, HORSTMANN MANFRED
Format Patent
LanguageEnglish
Published 02.07.2007
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Summary:By locally modifying the intrinsic stress of a dielectric layer laterally enclosing gate electrode structures of a transistor configuration formed in accordance with in-laid gate techniques, the charge carrier mobility of different transistor elements may individually be adjusted. In particular, in in-laid gate structure transistor architecture, NMOS transistors and PMOS transistors may receive a tensile and a compressive stress, respectively.
Bibliography:Application Number: KR20077008251