MEMORY DEVICE HAVING MESHED VP LINE
A memory device having a meshed VP line is provided to supply a cell capacitor plate voltage in order to prevent the influence from noise, by including VP lines with a meshed structure. In a memory device(300) including at least one cell array(310) including a plurality of cell blocks(315) including...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
05.01.2007
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Subjects | |
Online Access | Get full text |
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Summary: | A memory device having a meshed VP line is provided to supply a cell capacitor plate voltage in order to prevent the influence from noise, by including VP lines with a meshed structure. In a memory device(300) including at least one cell array(310) including a plurality of cell blocks(315) including a plurality of cells and a peripheral circuit(320) generating an internal voltage and a control signal required for storing data in the cell array or reading the stored data, a first VP line(350) supplies a cell capacitor plate voltage of the cell array and is arranged in a first direction. A plurality of second VP lines(360-1~360-n) is arranged on the cell array in a second direction perpendicular to the first VP line, and is connected to the first VP line. A plurality of subsidiary VP lines(370-1~370-m) is arranged on the cell array in the first direction, and is connected to the second VP line. |
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Bibliography: | Application Number: KR20050059171 |