SEMICONDUCTOR MEMORY DEVICE HAVING SELF REFRESH PULSE FOR EACH ONE OF BANKS
A semiconductor memory device having respective self refresh pulses for banks is provided to prevent an excessive current from being applied on the bank by adjusting the period of the self refresh pulse according to the refresh characteristic of the bank. A semiconductor memory device having respect...
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Main Author | |
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Format | Patent |
Language | English |
Published |
19.12.2006
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor memory device having respective self refresh pulses for banks is provided to prevent an excessive current from being applied on the bank by adjusting the period of the self refresh pulse according to the refresh characteristic of the bank. A semiconductor memory device having respective self refresh pulses for banks includes plural self refresh pulse generators(31~34). The self refresh pulse generator generates self refresh pulses having different pulse periods according to the refresh period of the respective banks. The semiconductor memory device includes plural row address counters(41~44), which receive the self refresh pulses, count the received signals, and output row address signals to the respective banks. Plural row decoders(51~54) receive the row address signals and allocate respective rows for the row address signals. |
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Bibliography: | Application Number: KR20050051123 |