A MEMORY ADDRESS GENERATING CIRCUIT AND A CONTROLLER USING THE CIRCUIT

A column address strobe (CAS) address selection circuits output CAS address signal using column address signals and select signals, and a row address strobe (RAS) address selection circuit outputs RAS address signal using row address signals and select signals. The CAS and RAS address select signals...

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Bibliographic Details
Main Author LIM, MIN SOO
Format Patent
LanguageEnglish
Published 17.08.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A column address strobe (CAS) address selection circuits output CAS address signal using column address signals and select signals, and a row address strobe (RAS) address selection circuit outputs RAS address signal using row address signals and select signals. The CAS and RAS address select signals are controlled to perform memory mapping according to the system configuration.
Bibliography:Application Number: KR20050011736