LCD FOR PREVENTING GENERATION OF DISPLAY DEFECT INCLUDING VERTICAL STRIPE ERROR OR HORIZONTAL STRIPE ERROR AND A METHOD FOR DRIVING THE SAME

• Main Authors: HWANG, CHANG WON, MAENG, HO SUK, JOO, SOONG YONG, SONG, SEOK CHEON
• Format: Patent
• Language: English; Korean
• Published: 10.03.2005
• Edition: 7
• Subjects: DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL ANALOGUE/DIGITAL CONVERTERS; OPTICAL LOGIC ELEMENTS; OPTICS; PHYSICS; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF

PURPOSE: An LCD(Liquid Crystal Display) and a method for driving the same are provided to prevent generation of display defects including vertical stripe error or horizontal stripe error, by sequentially outputting data generating voltage and gate off voltage based on outside power source voltage and sequentially outputting timing reset voltage and gate on voltage after receiving various image signals. CONSTITUTION: A timing controller(100) outputs the second image signal and the first and the second timing signals, based on the first image signal and the first timing signal provided from the outside. A data driver(200) converts the second image signal to analog image signal according to the second timing signal, and outputs the analog image signal to data lines of an LCD panel(500). A scan driver(300) outputs scan signal for activating gate lines of the LCD according to the third timing signal. An electric power generator(400) sequentially supplies data generating voltage to the data driver and gate off voltage to the scan driver, wherein the data generating voltage and the gate off voltage are generated based on outside source driving voltage. The electric power generator, also, sequentially supplies timing reset voltage to the timing controller and gate on voltage to the scan driver, wherein the timing reset voltage and the gate on voltage are generated based on outside dot clock.