NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND SUB-BLOCK ERASING METHOD THEREOF, ELECTRONIC CARD, AND ELECTRONIC DEVICE FOR NARROWING THRESHOLD VOLTAGE DISTRIBUTION

• Main Authors: FUTATSUYAMA, TAKUYA, SHIBATA, NOBORU, HOSONO, KOJI, IMAMIYA, KENICHI
• Format: Patent
• Language: English; Korean
• Published: 12.01.2005
• Edition: 7
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

PURPOSE: A non-volatile semiconductor memory device and sub-block erasing method thereof, electronic card, and electronic device are provided to narrow threshold voltage distribution by preventing memory cells from being overerased. CONSTITUTION: A sub-block erasing method for a non-volatile semiconductor memory device comprises the steps of: erasing a sub-block, a part of a memory cell block(s2); performing a verification reading of the sub-block erasing(s4); terminating the erasing of the sub-block if the sub-block erasing is completed according to a result of the verification reading(s5); performing a verification reading of an overprogrammd cell if the sub-block erasing is not completed, and determining whether the cause of fail is an unfinished erase or an existing of overprogrammed cell(s6). If the result of the verification reading of the overprogrammed cell passes, repeat the sub-block erasing(S2). and if the result of the verification reading of the overprogrammed cell fails, output the fail result, and complete the operation(S8).