DUAL GATE OXIDE LAYER STRUCTURE FORMED ON AN ENHANCED ACTIVE REGION STRUCTURE WITH HEIGHT LARGER THAN THAT OF ISOLATION REGION IN SEMICONDUCTOR DEVICE AND FORMING METHOD THEREBY

• Main Authors: CHUNG, BYUNG HONG, CHUN, JONG SIK, JO, HYUN HO
• Format: Patent
• Language: English; Korean
• Published: 03.01.2005
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE: A dual gate oxide layer structure in a semiconductor device and a forming method thereby are provided to utilize even sidewalls of a trench as an active region, to prevent the stringer due to a stepped portion between an active region and an isolation region, and to restrain a dent from being generated at an interface between the active and isolation regions by lowering an isolation layer under an upper surface of the active region. CONSTITUTION: Trenches(t1,t2) for defining a first active region and a second active region are in a semiconductor substrate(200). Each trench is filled with an isolation layer(208). An upper most portion of each isolation layer becomes lower than upper surfaces of the first and second active regions by etching the isolation layer as much as predetermined thickness. A first gate oxide layer(214) made of a first thermal oxidation layer is formed on the second active region and at first sidewalls(215) of the unfilled trenches. A second gate oxide layer(216) made of a second thermal oxidation layer is formed on the first active region and at second sidewalls(217) of the unfilled trenches. The first gate oxide layer is thicker than the second gate oxide layer.