METHOD FOR FABRICATING ETCHING MASK OF SEMICONDUCTOR STRUCTURE WITH TRENCH CAPACITOR AND ETCHING MASK FABRICATED THEREBY TO VARY DIMENSION OF SIDE SURFACE OF ACTIVE REGION

• Main Authors: WEGE STEPHAN, VOGT MIRKO, MOLL HANS PETER, STAVREV MOMTCHIL
• Format: Patent
• Language: English; Korean
• Published: 30.09.2004
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; MICROSTRUCTURAL TECHNOLOGY; PERFORMING OPERATIONS; PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS; SEMICONDUCTOR DEVICES; TRANSPORTING

PURPOSE: A method for fabricating an etching mask of a semiconductor structure with a trench capacitor is provided to vary the dimension of the side surface of an active region without a profile of a hard mask by an etching technique. CONSTITUTION: The third hard mask layer(80) is thinner than the first and second hard mask layers(60,70). The first, second and third hard mask layers are formed on a micro structure. A photoresist mask(100) is formed on the third hard mask layer. The third hard mask layer is patterned by using the photoresist mask and etching chemicals. While the photoresist mask is eliminated, the second hard mask layer is patterned by using the third hard mask layer and etching chemicals. While the third hard mask layer is removed, the first hard mask layer is patterned by using the second hard mask layer and etching chemicals. The patterned second hard mask layer is eliminated.