DISPLAY DRIVING CIRCUIT AND DISPLAY DEVICE

• Main Authors: MORITA AKIRA, TORIUMI YUICHI
• Format: Patent
• Language: English; Korean
• Published: 05.03.2004
• Edition: 7
• Subjects: ADVERTISING; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION; CRYPTOGRAPHY; DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING; DISPLAY; EDUCATION; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL ANALOGUE/DIGITAL CONVERTERS; OPTICAL LOGIC ELEMENTS; OPTICS; PHYSICS; SEALS; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF

PURPOSE: To provide a display driving circuit and a display device capable of reducing power consumption accompanying the supply of gradation data. CONSTITUTION: The display driving circuit is provided with 1st-Mth SR blocks BLK1-BLKM which are arranged in an area on the right side with a data input control circuit 50 as a reference and hold 1st-Mth gradation data, and (M+1)th-(M+N)th SR blocks BLKM+1-BLKM+N which are arranged in the area on the left side and hold (M+1)th-(M+N)th gradation data. The 1st-(M+N)th SR blocks BLK1-BLKM+N hold the 1st-(M+N)th gradation data masking-controlled on the basis of data enable signals shifted in the respective SR blocks. The 1st-Mth gradation data are set to a mask unreleased state in the order of 1st-Mth data masking circuits 521-52M. The (M+1)th-(M+N)th gradation data are set to a mask released state in the order of (M+1)th-(M+N)th data masking circuits 52M+1-52M+N.