Memory device

• Main Authors: NISHIO YOJI, FUNABA SEIJI
• Format: Patent
• Language: English; Korean
• Published: 15.03.2003
• Edition: 7
• Subjects: BASIC ELECTRONIC CIRCUITRY; CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; INFORMATION STORAGE; PHYSICS; PULSE TECHNIQUE; STATIC STORES

PURPOSE: To provide a memory device capable of reducing waveform distortion by reflection caused at high speed operation time in the memory device for mounting a controller on a mother board together with a plurality of memory modules. CONSTITUTION: This memory device is obtained with the constitution for arranging an active terminator in the controller and a memory unit since signal reflection is caused at writing and reading time of the memory unit on the memory modules by the controller. The active terminator is arranged in response to a data bus and/or a clock bus. The active terminator is arranged for terminating a line in the memory unit corresponding to the data bus and the clock bus. The active terminator arranged in the controller and the memory unit may be controlled in a nonoperating state when becoming the data receiving side. 모기판에 함께 설치된 제어기 및 복수의 메모리모듈들을 갖는 메모리장치에서, 신호반사에 의해 야기되는 파형 왜곡을 억제함으로써 고속동작이 수행된다. 제어기가 메모리모듈들의 메모리유닛들에 관하여 데이터의 기입/독출을 수행할 때 신호반사가 발생하므로, 능동종단기유닛들은 제어기 및 메모리유닛들 내에 구비된다. 이 능동종단기유닛들은 메모리유닛들 내의 데이터버스 및/또는 클록버스를 종단하기 위하여 이 버스들에 설치된다. 제어기 및 메모리모듈들에 마련된 능동종단기유닛들은 데이터가 수신될 때 비활성화 상태로 된다.