SCHOTTKY BARRIER DIODE AND METHOD OF FABRICATING THE SAME

PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be improved due to the distance between electrodes in a Schottky barrier diode, and etching a Schottky junction section cannot be controlled easily in...

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Main Authors ASANO TETSURO, ONODA KATSUAKI, ISHIHARA HIDETOSHI, NAKAJIMA YOSHIBUMI, TOMINAGA HISAAKI, HIRATA KOICHI, SAKAKIBARA MIKITO, MURAI SHIGEYUKI
Format Patent
LanguageEnglish
Korean
Published 06.03.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: To solve the problem that a chip cannot be miniaturized smoothly due to mesa etching and a thick polyimide layer and characteristics cannot be improved due to the distance between electrodes in a Schottky barrier diode, and etching a Schottky junction section cannot be controlled easily in a manufacturing method of a Schottky barrier diode. CONSTITUTION: N+-type ion implantation regions are provided on a substrate surface, thus eliminating the need for mesa and a polyimide layer, and achieving the planar type Schottky barrier diode of a compound semiconductor. The distance between electrodes can be reduced, thus shrinking the chip, and improving high-frequency characteristics. Additionally, GaAs is not etched when a Schottky junction region is formed, thus manufacturing a Schottky barrier diode having excellent reproducibility. 종래, 메사 에칭이나 두꺼운 폴리이미드층 등이 있기 때문에, 칩의 소형화가 실현되지 않고, 전극간의 거리가 있어 특성을 향상시킬 수 없었다. 또한, 제조 방법으로는 쇼트키 접합 부분의 에칭 컨트롤이 곤란하였다. 기판 표면에 n형 이온 주입 영역을 형성함에 의해, 메사 및 폴리이미드층을 형성할 필요가 없어져, 화합물 반도체의 플래너형 쇼트키 배리어 다이오드를 실현할 수 있다. 전극간 거리를 좁힐 수 있으므로 칩의 축소가 실현되고, 고주파 특성도 향상된다. 또한, 쇼트키 접합 영역 형성시에는 GaAs를 에칭하지 않으므로, 재현성이 좋은 쇼트키 배리어 다이오드를 제조할 수 있다.
Bibliography:Application Number: KR20020051405