SEMICONDUCTOR MEMORY

PURPOSE: To provide a semiconductor memory in which a refresh-cycle time can be shortened and power consumption at the time of refreshing can be reduced. CONSTITUTION: This memory has an address input circuit generating an internal address signal, a redundancy discriminating circuit receiving the in...

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Bibliographic Details
Main Authors YAHATA HIDEHARU, UEDA SHIGEKI, HORIGUCHI MASASHI
Format Patent
LanguageEnglish
Korean
Published 11.02.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:PURPOSE: To provide a semiconductor memory in which a refresh-cycle time can be shortened and power consumption at the time of refreshing can be reduced. CONSTITUTION: This memory has an address input circuit generating an internal address signal, a redundancy discriminating circuit receiving the internal address signal and discriminating whether the address corresponds to an address of a defective word line out of a plurality of regular word lines or not, an address counter generating a refresh-address signal for refreshing successively a plurality of regular word lines and redundant word lines, and at the time of refreshing, operation of the redundancy discriminating circuit is stopped. 본 발명은, 반도체메모리에 관한 것으로, 리후레시사이클시간을 단축할 수 있고, 또한 리후레시시의 소비전력을 저감할 수 있는 반도체메모리를 제공하는 것이다. 내부어드레스신호를 발생시키는 어드레스입력회로와, 상기 내부어드레스신호를 받아 상기 어드레스가 복수의 정규워드선중 불량워드선의 어드레스에 해당하는지 아닌지를 판정하는 용장판정회로와, 복수의 정규워드선과 용장워드선을 순차적으로 리후레시하기 위한 리후레시어드레스신호를 발생시키는 어드레스카운터를 갖고, 리후레시시에는 상기 용장판정회로를 동작정지하게 하는 기술이 제시된다.
Bibliography:Application Number: KR20020043773