THIN FILM TRANSISTOR SUBSTRATE AND PROCESS FOR PRODUCING THE SAME

• Main Authors: SATOU TAKESHI, KATOU TOMOYA, TAKAHASHI TAKUYA, KANEKO TOSHIKI, IKEDA HAJIME
• Format: Patent
• Language: English; Korean
• Published: 14.09.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL ANALOGUE/DIGITAL CONVERTERS; OPTICAL LOGIC ELEMENTS; OPTICS; PHYSICS; SEMICONDUCTOR DEVICES; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF

PURPOSE: To solve the problem of the characteristics of a thin-film transistor becoming ununiform, because the amount of regression due to the side-etch varies when a Mo-W alloy film which is to become the gate of the thin-film transistor is processed with wet-etching method which ensures superior productivity. CONSTITUTION: In a polycrystalline Si thin-film transistor substrate having a self-aligned LDD, the Mo-W alloy in a concentration of W from 5 wt.% to 30 wt.%, more desirably from 17 wt.% to 22 wt.% is used for the gate and a substrate is formed containing the process through wet etching which uses an echant having the phosphoric acid in the concentration range of 60 wt.% to 70 wt.%. 자기 정합 LDD를 갖는 다결정 Si 박막 트랜지스터 기판에서, 게이트에 W 농도가 5wt% 이상 25wt% 미만, 보다 바람직하게는 17wt% 내지 22wt%의 Mo-W 합금을 이용하여, 인산 농도를 60wt% 내지 70wt%의 에칭액을 이용한 웨트 에칭에 의한 공정을 포함하는 방법으로 형성된 박막 트랜지스터 기판은 균일한 특성을 가지며 생산성도 우수하다.