DUAL WORK FUNCTION SEMICONDUCTOR STRUCTURE WITH BORDERLESS CONTACT AND METHOD OF FABRICATING THE SAME

• Main Authors: YE QUIUYI, TONTI WILLIAM R, LI YU JUN
• Format: Patent
• Language: English; Korean
• Published: 05.08.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE: A semiconductor structure and a method for processing the same are provided to integrate dual work function logic technology with a borderless contact to achieve MLD performance and MDL array efficiency, and result in a cost effective, high performance embedded DRAM structure and process. CONSTITUTION: A semiconductor structure is provided which includes the first material and the second material. The first material has the first contact hole with a horizontal surface of the first material being adjacent to the first contact hole. The second material extends over the first material and the second material comprises the second contact hole, with the second contact hole extending over the first contact hole to expose a portion of the horizontal surface. A conductor is disposed within the first contact hole, and a spacer lines the second contact hole and extends over the conductor. The spacer(160) has a dimension sufficient so that no horizontal surface of the first material is exposed through the second contact hole. 무경계 컨택트를 갖는 이중 일함수(dual work function) 반도체 구조물 및 이의 제조 방법이 제공된다. 이 구조물은 실질적으로 캡이 존재하지 않는 게이트 및, 이 게이트에 인접하는 확산부에 대한 도전성 컨택트(상기 도전성 컨택트는 상기 게이트와 무경계임)를 갖는 전계 효과 트랜지스터를 포함할 수 있다. 이 구조물은 이중 일함수 구조물이기 때문에, 도전성 컨택트는 상기 캡이 존재하지 않은 게이트와 전기적으로 접촉하지 않고 상기 게이트 위로 연장될 수 있다.