SEMICONDUCTOR DEVICE

PURPOSE: To solve the problem that the size of a chip cannot be easily reduced since a plurality of large transistors are required to program and verify a fuse element. CONSTITUTION: A voltage generation circuit 11 generates a required voltage in each of program, verification, and lead operations. T...

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Bibliographic Details
Main Authors KOZUKA EIJI, MURAOKA KAZUYOSHI
Format Patent
LanguageEnglish
Korean
Published 22.07.2002
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:PURPOSE: To solve the problem that the size of a chip cannot be easily reduced since a plurality of large transistors are required to program and verify a fuse element. CONSTITUTION: A voltage generation circuit 11 generates a required voltage in each of program, verification, and lead operations. The output end of the voltage generation circuit 11 is connected to one end of fuse circuits 121 to 12n. The transistor 14 is connected to the other end of the fuse circuits 121 to 12n. In the program operation, a voltage outputted from the voltage generation circuit 11 is supplied to a selected fuse circuit, and a current flows via the fuse circuit and transistor 14. In the verification operation, a current outputted from the voltage generation circuit 11 flows to a pad 17 via the selected fuse circuit and a detection circuit 13. 전압 발생 회로(11)의 출력단은 각 퓨즈 회로(l2∼12)의 일단부에 접속되어 있다. 이들 퓨즈 회로의 타단부에는 트랜지스터(14)가 접속되어 있다. 프로그램 동작에서, 전압 발생 회로(11)로부터 출력되는 전압은 선택된 퓨즈 회로(12∼12)에 공급되고, 이 퓨즈 회로 및 트랜지스터(14)를 통해 전류가 흐른다. 검증 동작 시에는, 전압 발생 회로(11)로부터 출력되는 전류는 선택된 퓨즈 회로(12∼12) 및 검출 회로(13)를 통해 패드(17)에 흐른다.
Bibliography:Application Number: KR20020001675