POWER-UP CIRCUIT OF SEMICONDUCTOR DEVICE HAVING BISTABLE LATCH

PURPOSE: A power-up circuit is provided to be capable of minimizing current consumption and performing a stable operation. CONSTITUTION: A voltage detecting part(21) receives an output latch signal(LATOUT) provided from a bistable latch part(23) and supplies a control latch signal(LATCON). A logic s...

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Bibliographic Details
Main Author HONG, SUN WON
Format Patent
LanguageEnglish
Korean
Published 30.03.2002
Edition7
Subjects
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
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Summary:PURPOSE: A power-up circuit is provided to be capable of minimizing current consumption and performing a stable operation. CONSTITUTION: A voltage detecting part(21) receives an output latch signal(LATOUT) provided from a bistable latch part(23) and supplies a control latch signal(LATCON). A logic state of the control latch signal(LATCON) is varied as a power supply voltage(VDD) is increased over a predetermined drive voltage(Vdri). The bistable latch part(23) generates the output latch signal(LATOUT) in response to the control latch signal(LATCON). A bistable latch reset part(25) sets an initial value of the output latch signal(LATOUT) to a ground voltage in case that the power supply voltage is applied and increased. A buffer(27) buffers the output latch signal(LATOUT) to generate a power-up signal(VOUT) of a CMOS level.
Bibliography:Application Number: KR20000056193