DC OR AC ELECTRIC FIELD ASSISTED ANNEAL

PURPOSE: A method and apparatus of foming a junction profile are provided to increase the total diffusion of the single wafer process while keeping the same thermal profile would be desirable. CONSTITUTION: At least one dopant is introduced into a semiconductor substrate. The at least one dopant is...

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Bibliographic Details
Main Authors SLINKMAN JAMES ALBERT, ELLIS-MONAGHAN JOHN J, BALLANTINE ARNE W, GILBERT JEFFREY D, FURUKAWA TOSHIHARU, MILLER GLENN R
Format Patent
LanguageEnglish
Korean
Published 03.11.2001
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: A method and apparatus of foming a junction profile are provided to increase the total diffusion of the single wafer process while keeping the same thermal profile would be desirable. CONSTITUTION: At least one dopant is introduced into a semiconductor substrate. The at least one dopant is diffused in the semiconductor substrate through annealing the semiconductor substrate and the at least one dopant while exposing the semiconductor substrate to a DC and/or AC electric field. 본 발명은 반도체 디바이스 내의 원하는 접합 프로파일을 형성하는 방법에 관한 것이다. 적어도 하나의 도펀트가 반도체 기판으로 유입된다. 상기 적어도 하나의 도펀트는 반도체 기판을 동시에 전계에 노출시키는 동안 반도체 기판 및 상기 적어도 하나의 도펀트의 어닐링을 통해 반도체 기판에 확산된다.
Bibliography:Application Number: KR20010015922