METHOD FOR RECOVERING AND CHECKING IPC ERROR ON INTER PROCESSOR COMMUNICATION IN A EXCHANGE

• Main Author: LEE, U JUN
• Format: Patent
• Language: English; Korean
• Published: 18.10.2001
• Edition: 7
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; TELEPHONIC COMMUNICATION

PURPOSE: A method for variably checking and recovering IPC(Inter-Processor Communication) errors in a switching system is provided to minimize the load due to an IPC error check by variably operating an IPC error check period according to the characteristic of each switching system. CONSTITUTION: In case that an exchange is turned on and the switching system is initialized(200), the CPU of an FPRA processor creates an IPC transmit task and sets up the initial logic value of an IPC error check message transmit flag(chk_flag) as "0"(202). Also the CPU creates an IPC receive task and sets up the initial logic value of an IPC error check message receive flag(rcv_flag) as "0"(204). The CPU substitutes the logic value of the IPC transmit flag(chk_flag) for the logic value of the IPC receive flag(rcv_flag)(206). Then the CPU checks whether the IPC transmit flag value is "0"(208). In case that the IPC transmit flag value is "1", the CPU increases an IPC error count value(chkerr_cnt) by "1"(210). The CPU checks whether the IPC error count value is larger than or equal to "3"(212). In case that the IPC error count value is larger than "3", the CPU checks whether the IPC error count value exceeds "5"(214). In case that the IPC error count value doesn't exceed "5", the CPU judges that an IPC communication error is a problem on hardware, and resets an IPC transmit/receive part(216). However, if the IPC error count value exceeds "5", the CPU resets the CPU itself, and recovers an IPC error(218). 본 발명은 교환시스템에서 프로세서간 가변적 IPC 에러 검사방법에 있어서, 상기 프로세서간 IPC 통신중 IPC 에러가 발생하지 않는 경우에는 시스템 초기화시 설정되어 있는 일정 주기로 IPC 에러 검사를 수행하는 과정과, 상기 프로세서간 IPC 통신중 IPC 에러가 발생하는 경우에는 상기 정상 IPC 통신시의 IPC 에러 검사 주기보다 짧은 주기로 IPC 에러 검사를 수행하는 과정을 포함하여 구성함을 특징으로 한다.