ALGORITHM OF LRU BITS FOR REDUCING RAM SIZE
PURPOSE: An algorithm of LRU bits for reducing a RAM size is provided to reduce a size of LRU bits by being composed of 2 bits, and by removing an unused bit of LRU bits which occupies a size of a tag RAM. CONSTITUTION: It is determined whether a way 0,1 or a way 2,3 is corrected according to "...
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Main Author | |
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Format | Patent |
Language | English Korean |
Published |
07.05.2001
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: An algorithm of LRU bits for reducing a RAM size is provided to reduce a size of LRU bits by being composed of 2 bits, and by removing an unused bit of LRU bits which occupies a size of a tag RAM. CONSTITUTION: It is determined whether a way 0,1 or a way 2,3 is corrected according to "0" or "1' of LRU 0 bit. In case that a bit of LRU 0 bit is "0", and the way 0,1 is determined, it is determined whether a way 0 or a way 1 is corrected according to "0" or "1' of LRU 0 bit. In case that the bit of LRU 0 bit isn't "0", the bit of LRU 0 bit is "1", it is determined whether a way 2 or a way 3 is corrected according to "0" or "1' of LRU 0 bit. Therefore, LRU bits are composed of 2 bits. |
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Bibliography: | Application Number: KR19990042604 |