METHOD FOR ERROR DETECTION BY USING TOP-DOWN METHOD

According to one embodiment of the present disclosure, a method for error detection performed by one or more processors of a computing device is disclosed. The method may comprise: a step of evaluating an error rate in a unit of a first language for an evaluation target sentence; and a step of evalu...

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Bibliographic Details
Main Authors PAIK SANGYOUN, MUN HWANBOK, SHIN DONGCHAN, CHOI SUBONG, LEE JIHWA
Format Patent
LanguageEnglish
Korean
Published 23.06.2023
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Summary:According to one embodiment of the present disclosure, a method for error detection performed by one or more processors of a computing device is disclosed. The method may comprise: a step of evaluating an error rate in a unit of a first language for an evaluation target sentence; and a step of evaluating an error rate in a unit of a second language that is smaller than that of the unit of the first language based on the error of the first language unit. Therefore, the present invention is capable of providing the method for improving qualitative evaluation. 본 개시의 일 실시예에 따라 컴퓨팅 장치의 하나 이상의 프로세서에 의해 수행되는, 오류 검출을 위한 방법이 개시된다. 상기 방법은 평가 대상 문장에 대하여 제 1 언어 단위로 오류율을 평가하는 단계; 및 상기 제 1 언어 단위의 오류에 기초하여, 상기 제 1 언어 단위보다 더 작은 제 2 언어 단위로 오류율을 평가하는 단계를 포함할 수 있다.
Bibliography:Application Number: KR20220078808