FAN-OUT SEMICONDUCTOR PACKAGE MODULE

• Main Authors: KUROYANAGI AKIHISA, MYUNG JUN WOO, KIM YEONG A, KIM EUN SIL, KO YOUNG GWAN, KIM JIN SU
• Format: Patent
• Language: English; Korean
• Published: 28.12.2018
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The present disclosure relates to a fan-out semiconductor package module which comprises: a core member having a first through-hole and a second through-hole spaced from each other; a semiconductor chip having an active surface which is disposed in the first through-hole and has a connection pad disposed therein, and having an inactive surface which is on the opposite side to the active surface; a second passive component disposed in the second through-hole; a first sealing material covering at least a part of each of the core member and the second passive component, and filling at least a part of the second through-hole; a reinforcing member disposed on the first sealing material; a second sealing material covering at least a part of the semiconductor chip and filling at least a part of the first through-hole; and a connecting member disposed on the core member, the active surface of the semiconductor chip, and the second passive component, and including a re-wiring layer electrically connected to the connection pad and the second passive component. According to the present invention, the mounting area of the semiconductor chip and the plurality of passive components can be minimized. 본 개시는 서로 이격된 제1관통홀 및 제2관통홀을 갖는 코어부재, 상기 제1관통홀에 배치되며 접속패드가 배치된 활성면 및 상기 활성면의 반대측인 비활성면을 갖는 반도체칩, 상기 제2관통홀에 배치된 제2수동부품, 상기 코어부재 및 상기 제2수동부품 각각의 적어도 일부를 덮으며 상기 제2관통홀의 적어도 일부를 채우는 제1봉합재, 상기 제1봉합재 상에 배치된 보강부재, 상기 반도체칩의 적어도 일부를 덮으며 상기 제1관통홀의 적어도 일부를 채우는 제2봉합재, 및 상기 코어부재와 상기 반도체칩의 활성면과 상기 제2수동부품 상에 배치되며 상기 접속패드와 상기 제2수동부품과 전기적으로 연결된 재배선층을 포함하는 연결부재를 포함하는, 팬-아웃 반도체 패키지 모듈에 관한 것이다.