MULTI CHIP PACKAGE HAVING SPACER FOR BLOCKING INTER-CHIP HEAT TRANSFER

• Main Authors: YOO, JAE WOOK, HWANG, HEE JUNG, CHO, EUN SEOK
• Format: Patent
• Language: English
• Published: 06.03.2008
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A multi chip package having a spacer for blocking an inter-chip heat transfer is provided to prevent degradation of performance of the multi chip package due to heat transfer by using a heat transfer blocking spacer. A semiconductor chip stack structure(110) includes a first semiconductor chip(112) having a first function and a second semiconductor chip(114) having a second function which are mounted on a printed circuit board(102) and opposite to each other. A heat transfer blocking spacer(120) is interposed between the first semiconductor chip and the second semiconductor chip. An upper surface of the first semiconductor chip includes a first region(A1) opposite to the second semiconductor chip. The heat transfer blocking spacer is extended with a certain thickness in a second region(A2) that is a portion of the first region. The second region out of the first region covered by the heat transfer blocking spacer on an upper surface of the first semiconductor chip is equal to or greater than a third region which is not covered by the heat transfer blocking spacer.