NAND FLASH MEMORY DEVICE WITH IMPROVED OPERATING OPERATION AND DUAL PROGRAM FUCNTION

A NAND flash memory device having an improved operation speed is provided to improve the operation speed by separating bitlines into a plurality of bitline segments. A memory cell array(100) includes memory blocks. A plurality of bitlines are disposed on the memory cell array to be connected each me...

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Bibliographic Details
Main Author HWANG, SANG WON
Format Patent
LanguageEnglish
Published 24.07.2007
Subjects
ELECTRICITY
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Summary:A NAND flash memory device having an improved operation speed is provided to improve the operation speed by separating bitlines into a plurality of bitline segments. A memory cell array(100) includes memory blocks. A plurality of bitlines are disposed on the memory cell array to be connected each memory block. The bitlines are separated into at least two bitline segments to be electrically interconnected or insulated from each other by a switch circuit(400). The bitline segments of each bitline have different bitline loadings.
Bibliography:Application Number: KR20050112458