METHOD FOR MANUFACTURING ISOLATION LAYER OF SEMICONDUCTOR DEVICE PREVENTING THINNING AT TRENCH TOP CORNER USING DOUBLE O3-TEOS LAYER

• Main Authors: PI, SEUNG HO, WON, DAE HUI
• Format: Patent
• Language: English; Korean
• Published: 06.11.2004
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE: A method for manufacturing an isolation layer of a semiconductor device is provided to prevent thinning at a trench top corner by using a double O3-TEOS(Tetra Ethyl Ortho Silicate) oxide layer. CONSTITUTION: A pad oxide layer(12) and a nitride layer are sequentially formed on a substrate(10...