SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND FABRICATING METHOD THEREOF

• Main Authors: HASHIMOTO CHIEMI, YOSHIDA YASUKO, HASHIBA SOICHIRO, KANAI FUMIYUKI, TAKANO JUNICHI, YAMANAKA TOSHIAKI, FUKUDA KAZUSHI, KAWASHIMA MOTOKO, YAMASAKI KOJI, YOSHIZUMI KEIICHI, OHSHIMA MITSUGU, IKEDA SHUJI, YOSHIZAKI KAZUO, IMATO KOICHI, TABATA TSUYOSHI, HASHIMOTO TAKASHI, OKUYAMA KOSUKE, TOMITA KAZUSHI
• Format: Patent
• Language: English; Korean
• Published: 11.10.2002
• Edition: 7
• Subjects: ELECTRICITY

PURPOSE: A semiconductor integrated circuit device is provided to form a capacitive device of high capacitance and improve tolerance to an alpha-line soft error of an SRAM(static random access memory) cell by forming a capacitive device between a load MISFET(metal insulator semiconductor field effect transistor) and a plate electrode of a large area covering the MISFET. CONSTITUTION: Transfer MISFET's are controlled by word lines. A flip-flop circuit has driver MISFET's and load MISFET's. The SRAM cell has a memory cell constructed to includes the transfer MISFET's and the flip-flop circuit. The plate electrodes(26P) of large area fixed on predetermined power source lines are arranged over the load MISFET's such that the plate electrodes over the offset region of the load MISFET's are formed with an opening(29A,29B). A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer and driver MISFET's formed over the main surface of a semiconductor substrate(1) and the load MISFET's formed of a polycrystalline silicon film deposited on the driver MISFET's.