SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CURRENT REDUCTION CIRCUIT IN STANDBY STATE

• Main Authors: KAWASE YASUSHI, AKIBA TAKESADA, TACHIBANA TOSHIKAZU, WATANABE TAKAO, KAWAHARA TAKAYUKI, KAWAJIRI YOSHIKI, AOKI MASAKAZU, HORIGUCHI MASASHI, KITSUKAWA GORO
• Format: Patent
• Language: English; Korean
• Published: 05.09.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; BASIC ELECTRONIC CIRCUITRY; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; PHYSICS; PULSE TECHNIQUE; SEMICONDUCTOR DEVICES; STATIC STORES

PURPOSE: A semiconductor integrated circuit is provided to reduce the current consumption in the stand-by state even when CMOS circuit is shrunken and the subthreshold current increases. CONSTITUTION: In the initial stand-by state, an input(Ii) of Ci is at a high level VC, and an output(Oi) is at a low level VS. In this connection, a P-channel MOS transistor is normally in an OFF state, and an N-channel MOS transistor is normally in an ON state. The subthreshold current which becomes a problem in case of no provision of a switch(S1) is a current which flows, when the output(Oi) is at a low level, from VC to VS through the P-channel MOS transistor which is off and the N-channel MOS transistor which is on. In the stand-by state, T1 is set to the low level so that the switch(S1) is turned off. However, even when the switch(S1) is turned off, the leakage current of the switch cannot be disregarded. However, a leakage current of the switch is set to a value smaller than the above subthreshold current. Therefore, the current consumption in the stand-by state is necessarily small.