MOSFET HAVING LDD STRUCTURE FOR PREVENTING DRAIN JUNCTION LEAKAGE

• Main Authors: YANG, JUNG SEOP, BAEK, DONG WON, KIM, SE JEONG, YOON, GYEONG IL, YANG, YE SEOK
• Format: Patent
• Language: English; Korean
• Published: 27.08.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PURPOSE: A MOSFET with an LDD(Lightly Doped Drain) structure is provided to be capable of preventing drain junction leakage by restraining a dislocation loop caused by a gate sidewall spacer. CONSTITUTION: A portion(b) cross to a gate sidewall spacer(22) in the boundary between a field region(23) and an active region(24) is formed at an outside of a heavily doped region(25) for forming a source and drain. Thereby, the generation of dislocation loop at the boundary portion between the active region(24) and the field region(23) is restrained, Also, the drain junction leakage at the portion(b) cross to the gate sidewall spacer(22) is restrained. 본 발명은 LDD(lightly dopped drain) 구조의 모스펫에 관련된 디자인 레이아웃에서 드레인 접합 누설에 취약한 부위의 아이솔레이션 층의 디자인 레이아웃을 변경하여 드레인 접합 누설을 방지함으로써 소자의 높은 전압 특성 및 IDD 전류 특성을 개선하는 모스펫(MOSFET) 및 그 레이아웃 방법에 관한 것이다.