METHOD FOR DRIVING FLASH MEMORY CELL
PURPOSE: A method for driving a flash memory cell is provided to improve an over-erase phenomenon and a read disturb phenomenon by performing a program operation under four voltage conditions and performing an erase operation under three voltage conditions. CONSTITUTION: The program operation is per...
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Main Author | |
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Format | Patent |
Language | English Korean |
Published |
13.05.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PURPOSE: A method for driving a flash memory cell is provided to improve an over-erase phenomenon and a read disturb phenomenon by performing a program operation under four voltage conditions and performing an erase operation under three voltage conditions. CONSTITUTION: The program operation is performed under the four conditions. A voltage higher than a voltage applied to a source electrode(7) is applied to a control gate(5) while a drain electrode(8) and a substrate are open. A voltage higher than a voltage applied to the drain electrode is applied to the control gate while the source electrode and the substrate are open. A voltage higher than a voltage equally applied to the source/drain electrode is applied to the control gate while the substrate is open. A voltage higher than a voltage equally applied to the source/drain electrode and the substrate is applied to the control gate. The erase operation is performed under following three conditions. A voltage higher than a voltage applied to the substrate is applied to the control gate while the source/drain electrode is open. A voltage higher than a voltage equally applied to the source/drain electrode and the substrate is applied to the control gate. A voltage lower than a voltage equally applied to the source/drain electrode is applied to the substrate and a voltage higher than a voltage equally applied to the source/drain electrode is applied to the control gate.
본 발명은 플래쉬 이이피롬 셀에 관한 것으로, N형 실리콘 기판 상부의 소정 영역에 터널 산화막, 플로팅 게이트, 유전체막 및 콘트롤 게이트가 적층되어 형성된 게이트 전극과, 상기 N형 실리콘 기판상에 P형 불순물을 주입하여 형성된 소오스 전극 및 드레인 전극으로 이루어져, 네가지 전압 조건에 의해 프로그램을 실시하고, 세가지 전압 조건에 의해 소거를 실시함으로써 오버 이레이즈, 리이드 디스터브 현상을 개선할 수 있을 뿐만 아니라 소거 속도를 향상시킬 수 있는 P형 MOSFET를 이용한 플래쉬 이이피롬 셀의 구동 방법이 제시된다. |
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Bibliography: | Application Number: KR19950029988 |