MULTIPLIER USING CCD

• Main Author: SON, YEONG SU
• Format: Patent
• Language: English; Korean
• Published: 30.11.2001
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PURPOSE: A multiplier using a CCD(Charge Coupled Device) is provided to execute a calculation with a simple control signal by simplifying a circuit configuration such as a full adder, a half adder, a register and so on with the charge transfer and digital logic operation function of the CCD. CONSTITUTION: The multiplier comprises a divisor and dividend register(11,12) outputting a divisor and dividend value of binary after temporarily storing the divisor and dividend value of binary number, a CCD(16) connecting to the dividend register and transmitting the signal charge according to the dividend value, an accumulator(23) connecting to the CCD and divisor register and accumulating the divisor and dividend value, and an adder connecting to the accumulator and outputting the multiplying value of divisor by dividend by calculating the signal outputted from the accumulator. The CCD includes a floating gate to read a transmitting terminal(13,14,15) signal charge without destroying, and the output terminal transmitting the signal charge from the dividend register. The adder comprises a plurality of full adders and half adders, and the accumulator comprises a plurality of accumulators outputting the result by executing an AND logic operation with the binary signal outputted from the CCD and the signal charge outputted from the divisor register. 본 발명은 전하 결합 소자를 이용한 곱셈기에 관한 것으로, 곱셈기의 구성 회로에 전하 결합소자(CCD)를 적용하여 전하 전송과 디지탈 논리연산기능을 이용한 것으로, 종래의 곱셈기에 비해 가산부들의 회로의 구성이 간단하고, 2상 CCD의 글록킹 신호이외에는 별도의 제어신호가 필요치않아 종래의 곱셈기에 비해 간단한 제어신호로 연산이 가능하다.