PLANARIZATION METHOD FOR INTERLAYER INSULATING FILM

PURPOSE: A method for planarizing an interlayer dielectric is provided to prevent a conductive characteristic of a conductive wire from being oxidized and degraded in a planarization process of the interlayer dielectric, and to improve a flow characteristic of the interlayer dielectric. CONSTITUTION...

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Bibliographic Details
Main Authors JUNG, WOOIN, LEE, MYUNGBUM, CHOI, JIHYUN, KIM, CHANGKYU
Format Patent
LanguageEnglish
Korean
Published 01.12.2000
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PURPOSE: A method for planarizing an interlayer dielectric is provided to prevent a conductive characteristic of a conductive wire from being oxidized and degraded in a planarization process of the interlayer dielectric, and to improve a flow characteristic of the interlayer dielectric. CONSTITUTION: A thin silicon layer is deposited on a substrate where a conductive wire or conductive layer is formed. An interlayer dielectric is deposited. The conductive wire or conductive layer is planarized while the conductive wire or conductive layer is not oxidized. 본발명은 반도체장치의 층간절염낙을 평탄화하는 방법에 관한 것으로 도전선(또는 도전막)이 형성되어 있는 기판상에얇은 실리콘막을 침적하는 공정, 층간절연막을 침적하는 공정, 상기 도전선이 산화되지 않으면서 평탄화하는 공정을 구비하여 이루어진 것을 특징으로 한다. 따라서 상기한 본 발명의 방법에 의하면 층간절연막의 평탄화공정시 도전선이 산화되어 도전특성이 열화되는 것을 방지할 수 있으며 층간절연막의 플로우특성을 향상시키는 이점이있다.
Bibliography:Application Number: KR19920015280