NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE MEMORY CELLS OF PLATE CELL STRUCTURE AND PROGRAM METHOD THEREOF

PURPOSE: An NAND type flash memory device having a plate cell structure is provided to lower a voltage applied to a booster plate when a program is operated. CONSTITUTION: The flash memory device includes a cell array(100), a section decoder(120), a block decoder(110) and a booster plate(102). The c...

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Bibliographic Details
Main Authors JUNG, TAE-SUNG, LEE, DONG-KEE
Format Patent
LanguageEnglish
Published 15.04.2000
Edition7
Subjects
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Summary:PURPOSE: An NAND type flash memory device having a plate cell structure is provided to lower a voltage applied to a booster plate when a program is operated. CONSTITUTION: The flash memory device includes a cell array(100), a section decoder(120), a block decoder(110) and a booster plate(102). The cell array electrically erasable and programmable memory cells having a source, a drain, a floating gate and a control gate, and a conductive layer covering the memory cells. The section decoder supplies the first voltage to the control gate of a cell being addressed of the memory cells. The block decoder supplies the second voltage to the conductive layer after the control gate of the addressed memory cell is sufficiently charged to the first voltage. When the second voltage is applied to the conductive layer, the booster plate makes it possible doing so that the voltage of the control gate is boosted by the second voltage by cutting that the first voltage is applied to the control gate.
Bibliography:Application Number: KR19970019239