SCANNING ELECTRON MICROSCOPE BASED PARAMETRIC TESTING METHOD AND APPARATUS

A scanning electron microscope (28) is connected to a test structure (48) formed on a semiconductor wafer. The test structure (48) comprises a plurality of first parallel structures (54) and a plurality of second parallel structure (56) transverse to and interlocking with the first structures (54)....

Full description

Saved in:
Bibliographic Details
Main Authors MAHANT-SHETTI, SHIVALING S, GALE, REBECCA J, ATON, THOMAS J
Format Patent
LanguageEnglish
Korean
Published 01.02.1999
Edition6
Subjects
APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBEMICROSCOPY [SPM]
BASIC ELECTRIC ELEMENTS
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SCANNING-PROBE TECHNIQUES OR APPARATUS
SEMICONDUCTOR DEVICES
TESTING
Online AccessGet full text

Cover

More Information
Summary:A scanning electron microscope (28) is connected to a test structure (48) formed on a semiconductor wafer. The test structure (48) comprises a plurality of first parallel structures (54) and a plurality of second parallel structure (56) transverse to and interlocking with the first structures (54). An island (60) is formed within a grid (58) formed by the structures (54-56) and is separated therefrom. An electron beam (38) from the scanning electron microscope (28) is aimed at the structure (48) and secondary electrons emitted therefrom are visually displayed on a monitor (44). The visual display (47) provides information on whether the island (60) is electrically separated from the mesh (58) or shorted thereto by comparing the intensity of the various islands (60).
Bibliography:Application Number: KR19900003783