IN-CIRCUIT TESTER

PURPOSE:To make it possible to measure the mounted state of an integrated circuit without fail, by connecting first and second contacting means to a first terminal to which a power line of the integrated circuit is connected, or to a second terminal to which the power line is not connected. CONSTITU...

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Bibliographic Details
Main Author NAGANO KATSUMI
Format Patent
LanguageEnglish
Published 03.04.1989
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:PURPOSE:To make it possible to measure the mounted state of an integrated circuit without fail, by connecting first and second contacting means to a first terminal to which a power line of the integrated circuit is connected, or to a second terminal to which the power line is not connected. CONSTITUTION:When relay switches RL1 and RL2 are put in the ON state by the control of a control element CT, a power VS is supplied to an integrated circuit IC through a bus line BS1, the switch RL1, a probe pin CP1, a test land TL1 and a lead pin LP1. Since the switch RL2 is in the ON state, an output voltage V0 of an operational amplifier MOA for measurement turns to be as expressed by an equation V0=-Rref.VS/R. Since a conversion resistance Rref and the voltage VS are already known, a resistance value between test lands TL1 and TL2 can be determined by measuring the voltage V0 of the amplifier MOA by the control element CT, and it can be discriminated therefrom whether the mounted state of the integrated circuit IC1 is normal or not.
Bibliography:Application Number: JP19870246007