MOS TYPE THIN-FILM TRANSISTOR

PURPOSE:To increase an effective channel width and an ON current, by using an insulating substrate having a trench of a specific configuration in a MOS thin film transistor having a polysilicon layer comprising source and drain regions and a channel region on the insulating substrate. CONSTITUTION:A...

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Bibliographic Details
Main Authors NABESHIMA REIKO, ABE SHUYA, WATANABE HIROBUMI, MORI KOJI
Format Patent
LanguageEnglish
Published 07.03.1989
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Summary:PURPOSE:To increase an effective channel width and an ON current, by using an insulating substrate having a trench of a specific configuration in a MOS thin film transistor having a polysilicon layer comprising source and drain regions and a channel region on the insulating substrate. CONSTITUTION:A trench having a depth of 3mum or less in a longitudinal direction of a channel and a width of its opening section of a length more than one third of the depth is formed on an insulating film 1 such as a quartz substrate, a glass substrate and the like. At this time, it is possible to adjust the ratio of etching in a depth direction to etching in a lateral direction, that is, a taper angle of a wall of a trench 8 by changing the ratio of isotropic etching to anisotropic etching. Any number of the trenches can be provided in parallel. A p-Si layer 9, an SiO2 oxide film 10 as an insulating layer and a p-Si layer 11 are formed on the thus provided trench 8. Then, impurities are diffused in a self-alignment manner to form a gate electrode and source and drain regions on the p-Si layer 9 and the like by an ordinary method.
Bibliography:Application Number: JP19870217084